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  supertex inc. supertex inc. www.supertex.com hv209 doc.# dsfp-hv209 b070213 features ? hvcmos ? technology for high performance ? operating voltage of up to 200v ? output on-resistance typically 22 ? integrated bleed resistors on the outputs ? 5.0v to 12.0v cmos logic compatibility ? very low quiescent current consumption (-10a) ? -58db typical off isolation at 5.0mhz ? low parasitic capacitance ? excellent noise immunity ? flexible high voltage supplies general description the supertex hv209 is a 200v low charge injection 12-channel high voltage analog switch conigured as 6 spdt analog switches intended for medical ultrasound applications. bleed resistors are integrated on the output switches to eliminate charge built up on the piezo electric transducers.the bleed resistors are at a nominal value of 35k . using hvcmos technology, this device combines high voltage bilateral dmos switches and low power cmos logic to provide eficient control of high voltage analog signals. the outputs are conigured as single-pole double- throw analog switches. data is shifted into a 6-bit shift register using an external clock. the le latches the shift register data into the individual switch latches. a logic hi connects a switch common y x to sw x . a logic low connects y x to sw x . a logic hi in cl resets all switches to sw x simultaneously. 12-channel high voltage analog switch sw2 sw3 sw4 sw5 sw0y0 sw0 y1 sw1 cl clk vdd dout din gnd 6 bit shift register vpp vnn le dle cl sw1 y2sw2 y3sw3 y4sw4 y5sw5 r gnd1 /r gnd2 high voltage level translator dle cl dle cl dle cl dle cl dle cl high voltage level translator high voltage level translator high voltage level translator high voltage level translator high voltage level translator block diagram downloaded from: http:///
2 hv209 supertex inc. www.supertex.com doc.# dsfp-hv209 b070213 recommended operating conditions sym parameter value v pp positive high voltage supply 1 +40v to v nn +200v v nn negative high voltage supply 1 -10v to -160v v dd logic power supply voltage 1 +4.5v to +13.2v v ih high-level input voltage 0.8v dd to v dd v il low-level input voltage 0v to 0.2v dd v sig analog signal voltage peak-to-peak 2 v nn +10v to v pp -10v t a operating free air-temperature 0c to 70c notes: 1. power up/down sequence is arbitrary except gnd must be powered-up irst and powered-down last. 2. v sig must be within v pp and v nn voltage range or loating during power up/down transition. absolute maximum ratings parameter value v dd logic power supply voltage -0.5v to +15v v pp - v nn supply voltage +220v v pp positive high voltage supply -0.5v to +200v v nn negative high voltage supply +0.5v to -200v logic input voltages -0.5v to v dd +0.3v v sig analog signal range v nn to v pp peak analog signal current/channel 3.0a storage temperature -65c to +150c power dissipation: 48-lead lqfp 1.0w absolute maximum ratings are those values beyond which damage to the device may occur. functional operation under these conditions is not implied. continuous operation of the device at the absolute rating level may affect device reliability. all voltages are referenced to device ground. pin coniguration 1 48 48-lead lqfp (top view) product marking 48-lead lqfp yy = year sealed ww = week sealed l = lot number c = country of origin* a = assembler id* = green packaging *may be part of top marking top marking bottom marking yyww hv209fg lllllllll cccccccc aaa package may or may not include the following marks: si or ordering information part number package option packing HV209FG-G 48-lead lqfp 250/tray HV209FG-G m931 1000/reel -g indicates package is rohs compliant (green) typical thermal resistance package ja 48-lead lqfp 52 o c/w downloaded from: http:///
3 hv209 supertex inc. www.supertex.com doc.# dsfp-hv209 b070213 sym parameter 0 o c +25 o c +70 o c units conditions min max min typ max min max r ons small signal switchon-resistance - 30 - 26 38 - 48 i sig = 5.0ma v pp = 40v v nn = -160v - 25 - 22 27 - 32 i sig = 200ma - 25 - 22 27 - 30 i sig = 5.0ma v pp = 100v v nn = -100v - 18 - 18 24 - 27 i sig = 200ma - 23 - 20 25 30 i sig = 5.0ma v pp = 190v v nn = -10v - 22 - 16 25 27 i sig = 200ma r ons small signal switch on-resistance matching - 20 - 5.0 20 - 20 % i sw = 5.0ma, v pp = 100v, v nn = -100v r onl large signal switch on-resistance - - - 15 - - - v sig = v pp -10v, i sig = 1.0a r int output switch shunt resistance - - 20 35 50 - - k output switch to r gnd i rint = 0.5ma v os dc offset switch off - 50 - - 50 - 50 mv no load, r gnd = 0v dc offset switch on - 50 - - 50 - 50 mv no load, r gnd = 0v i ppq pos. hv supply current - - - 10 50 - - a all sws off i nnq neg. hv supply current - - - -10 -50 - - i ppq pos. hv supply current - - - 10 50 - - a all sws on, i sw = 5.0ma i nnq neg. hv supply current - - - -10 -50 - - i sw switch output peakcurrent - 3.0 - 3.0 2.0 - 2.0 a v sig duty cycle 0.1% f sw output switch frequency - - - - 50 - khz duty cycle = 50% i pp i pp supply current - 6.5 - - 7.0 - 8.0 ma v pp = 40v v nn = -160v 50khz output switching frequency with no load - 4.0 - - 5.0 - 5.5 v pp = 100v v nn = -100v - 4.0 - - 5.0 - 5.5 v pp = 190v v nn = -10v i nn i nn supply current - 6.5 - - 7.0 - 8.0 ma v pp = 40v, v nn = -160v 50khz output switching frequency with no load - 4.0 - - 5.0 - 5.5 v pp = 100v v nn = -100v - 4.0 - - 5.0 - 5.5 v pp = 190v v nn = -10v i dd logic supply average current - 4.0 - - 4.0 - 4.0 ma f clk = 5.0mhz, v dd = 5.0v i ddq logic supply quiescent current - 10 - - 10 - 10 a --- i sor data out source current 0.45 - 0.45 0.70 - 0.40 - ma v out = v dd -0.7v i sink data out sink current 0.45 - 0.45 0.70 - 0.40 - ma v out = 0.7v c in logic input capacitance - 10 - - 10 - 10 pf --- dc electrical characteristics (over recommended operating conditions unless otherwise noted) downloaded from: http:///
4 hv209 supertex inc. www.supertex.com doc.# dsfp-hv209 b070213 sym parameter 0 o c +25 o c +70 o c units conditions min max min typ max min max t sd set up time before le rises 150 - 150 - - 150 - ns --- t wle time width of le 150 - 150 - - 150 - ns --- t do clock delay time to data out - 150 - - 150 - 150 ns --- t wcl time width of cl 150 - 150 - - 150 - ns --- t su set up time data to clock 15 15 8.0 - 20 - ns --- t h hold time data from clock 35 - 35 - - 35 - ns --- f clk clock frequency - 5.0 - - 5.0 - 5.0 mhz 50% duty cycle, f data = f clk /2 t on turn on time - 5.0 - - 5.0 - 5.0 s v sig = v pp -10v, r l = 10k t off turn off time - 5.0 - - 5.0 - 5.0 s v sig = v pp -10v, r l = 10k dv/dt maximum v sig slew rate - 20 - - 20 - 20 v/ns v pp = 40v, v nn = -160v - 20 - - 20 - 20 v pp = 100v, v nn = -100v - 20 - - 20 - 20 v pp = 190v, v nn = -10v k o off isolation -30 - -30 -33 - -30 - db f = 5.0mhz, 1.0k//15pf load -58 - -58 - - -58 - db f = 5.0mhz, 50 load k cr switch crosstalk -60 - -60 -70 - -60 - db f = 5.0mhz, 50 load i id output switch isolation diode current - 300 - - 300 - 300 ma 300ns pulse width, 2.0% duty cycle c gs(off) off capacitance switch to gnd 5.0 17 5.0 12 17 5.0 17 pf 0v, 1.0mhz c gs(on) on capacitance switch to gnd 25 50 25 38 50 25 50 pf 0v, 1.0mhz +v spk output voltage spike - 150 - - 150 - 150 mv r load = 50 -v spk - 150 - - 150 - 150 r load = 50 ac electrical characteristics(over recommended operating conditions v dd = 5.0v unless otherwise noted) downloaded from: http:///
5 hv209 supertex inc. www.supertex.com doc.# dsfp-hv209 b070213 test circuits dc offset on/off v pp 5v v nn vpp vnn vdd gnd v out t on /t off test circuit v pp 5v v nn vpp vnn vdd gnd v pp -10v 10k v out isolation diode current i id 5v gnd v nn v sig crosstalk nc 5v gnd 50 output vo ltage spike v pp 5v v nn vpp vnn vdd gnd v out 1k r load 50 +v spk Cv spk off isolation k o = 20log v out v in v in =10v p-p @5mhz v pp 5v v nn vpp vnn vdd gnd v out 50 r load r load v in =10v p-p @5mhz v pp v nn vpp vnn vdd v pp v nn vpp vnn vdd k cr = 20log v out v in downloaded from: http:///
6 hv209 supertex inc. www.supertex.com doc.# dsfp-hv209 b070213 logic timing waveforms logic truth table data inputs le cl switch states d0 d1 d2 d3 d4 d5 y0 y1 y2 y3 y4 y5 l l l sw0 h l l sw0 l l l sw1 h l l sw1 l l l sw2 h l l sw2 l l l sw3 h l l sw3 l l l sw4 h l l sw4 l l l sw5 h l l sw5 x x x x x x h l hold previous state x x x x x x x h sw0 sw1 sw2 sw3 sw4 sw5 data in le clock data out off on v out (typ) 50% 50% 50% 50% t wle t sd t su t h 50% 50% t off 50% t do t on t wcl clr d n+1 d n d n-1 50% 50% 90% 10% downloaded from: http:///
7 hv209 supertex inc. www.supertex.com doc.# dsfp-hv209 b070213 pin description pin # function 1 n/c 2 sw0 3 y0 4 sw0 5 n/c 6 sw2 7 y2 8 sw2 9 n/c 10 sw4 11 y4 12 sw4 13 n/c 14 n/c 15 n/c 16 vnn 17 n/c 18 n/c 19 n/c 20 n/c 21 vpp 22 n/c 23 n/c 24 n/c pin # function 25 sw5 26 y5 27 sw5 28 n/c 29 sw3 30 y3 31 sw3 32 n/c 33 sw1 34 y1 35 sw1 36 n/c 37 rgnd1 38 n/c 39 dout 40 vdd 41 din 42 clr 43 le 44 clk 45 gnd 46 n/c 47 n/c 48 rgnd2 downloaded from: http:///
supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives an adequate product liability indemnification insurance agreement. supertex inc . does not assume responsibility for use of devices described, and limits its liabilit y to the replacement of the devices determined defective due to workmanship. no responsibility is assumed for possible omissions and inaccuracies. circuitry and specifications are subject to change without notice. for the latest product specifications refer to the supertex inc . (website: http//www .supertex.com) ?2013 supertex inc. all rights reserved. unauthorized use or reproduction is prohibited. supertex inc. 1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www.supertex.co m 8 hv209 (the package drawing(s) in this data sheet may not relect the most current speciications. for the latest package outline information go to http://www.supertex.com/packaging.html .) doc.# dsfp-hv209 b070213 48-lead lqfp package outline (fg) 7.00x7.00mm body, 1.60mm height (max), 0.50mm pitch symbol a a1 a2 b d d1 e e1 e l l1 l2 dimension (mm) min 1.40* 0.05 1.35 0.17 8.80* 6.80* 8.80* 6.80* 0.50 bsc 0.45 1.00 ref 0.25 bsc 0 o nom - - 1.40 0.22 9.00 7.00 9.00 7.00 0.60 3.5 o max 1.60 0.15 1.45 0.27 9.20* 7.20* 9.20* 7.20* 0.75 7 o jedec registration ms-026, variation bbc, issue d, jan. 2001. * this dimension is not speciied in the jedec drawing. drawings are not to scale. supertex doc. #: dspd-48lqfpfg version, d041309. 1 seating plane gauge plane l l1 l2 vi ew b view b seating plane top view side view note 1(index area d1/4 x e1/4) 48 a2 a a1 b d d1 e e1 e note: 1. a pin 1 identiier must be located in the index area indicated. the pin 1 identiier can be: a molded mark/identiier; an embedded metal marker; or a printed indicator. downloaded from: http:///


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